CD14538B dual precision monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.
An external resistor (RX) and an external capacitor (CX) control the timing and accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX. Precision control of output pulse widths is achieved through linear CMOS techniques.
Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD14538B is not used, its inputs must be tied to either VDD or VSS. See Table 1.
In normal operation the circuit retriggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used. The time period (T) for this multivibrator can be calculated by: T = RXCX.
The minimum value of external resistance, RX, is 4 K. The minimum and maximum values of external capacitance, CX are 0 pF and 100µF, respectively.
The CD14538B is interchangeable with type MC14538 and is similar to and pin-compatible with the CD4098B* and CD4538B. It can replace the CD4538B which type is not recommended for new designs.
The CD14538B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). More information: Weight & dimensions | Width | 19.69 mm |  | Depth | 6.6 mm | | Height | 4.57 mm | | Width (with pins) | 19.69 mm | | Depth (with pins) | 10.92 mm | | Height (with pins) | 8.26 mm | | Package depth | 506 mm | | Package width | 13.97 mm | | Package height | 11.23 mm | Features | Type | Logic IC | | Storage temperature (T-T) | -65 - 150 °C | | Number of pins | 16 | | Operating temperature (T-T) | -55 - 125 °C |
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