CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix). More information: Weight & dimensions | Width | 8.75 mm |  | Depth | 4 mm | | Height | 1.5 mm | | Width (with pins) | 8.75 mm | | Depth (with pins) | 6.2 mm | | Height (with pins) | 1.75 mm | | Package depth | 506.6 mm | | Package width | 8 mm | | Package height | 3.94 mm | Features | Type | Logic IC | | Storage temperature (T-T) | -65 - 150 °C | | Number of pins | 14 | | Operating temperature (T-T) | -55 - 125 °C |
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